Patent · US Active

Systems and methods for improving write preambles in DDR memory devices

US10510398B2 · kind B2 · utility

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13Claims
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Key dates

Filing dateNov 29, 2017
Grant dateDec 17, 2019
Priority date
Expiry dateNov 29, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2207/2254
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory device includes a data write circuitry. The data write circuitry is configured to capture a first write command received via an external input/output (I/O) interface. The data write circuitry is further configured to generate a first internal write start (InternalWrStart) in a data strobe (DQS) domain after capture of the first write command. The data write circuitry is additionally configured to write a first one or more data bits into at least one memory bank based on the first InternalWrStart, wherein the first InternalWrStart is generated internally in the memory device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.