Porous polyurethane polishing pad and process for preparing a semiconductor device by using the same
US10513007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2018 |
| Grant date | Dec 24, 2019 |
| Priority date | — |
| Expiry date | May 25, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
The embodiments relate to a porous polyurethane polishing pad and a process for preparing a semiconductor device by using the same. The porous polyurethane polishing pad comprises a urethane-based prepolymer and a curing agent, and has a thickness of 1.5 to 2.5 mm, a number of pores whose average diameter is 10 to 60 μm, a specific gravity of 0.7 to 0.9 g/cm3, a surface hardness at 25° C. of 45 to 65 Shore D, a tensile strength of 15 to 25 N/mm2, an elongation of 80 to 250%, an AFM (atomic force microscope) elastic modulus of 30 to 100 MPa measured from a polishing surface in direct contact with an object to be polished to a predetermined depth wherein the predetermined depth is 1 to 10 μm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.