Patent · US Active

Fully self-aligned via

US10522404B2 · kind B2 · utility

0Cited by
1References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 24, 2019
Grant dateDec 31, 2019
Priority date
Expiry dateJul 24, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/53266
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.