Semiconductor structure
US10522463B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 24, 2019 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | May 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5226
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure is provided and includes a base substrate including a device region and a peripheral region surrounding the device region, the base substrate including a base interconnection structure formed in each of the device region and the peripheral region; a medium layer on the base substrate; a first interconnection structure through the medium layer and on the base interconnection structure in the device region; and a second interconnection structure through the medium layer and on the base interconnection structure in the peripheral region. The first interconnection structure includes: a first portion over the base interconnection structure, and a second portion partially on the first portion and partially on a portion of the medium layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.