Method for manufacturing CMOS image sensor
US10522585B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2017 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Apr 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/805
Abstract
A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.