Transistors with ballistic or quasi-ballistic carrier behavior and low resistance in source and drain nodes
US10522683B2 · kind B2 · utility
0Cited by
4References
23Claims
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Inventors
Key dates
| Filing date | Apr 25, 2018 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Apr 25, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment includes an apparatus comprising: a transistor including an epitaxial source, a channel, and an epitaxial drain; a fin that includes the channel, the channel including a long axis and a short axis; a source contact corresponding to the source; and a drain contact corresponding to the drain; wherein (a) an additional axis intersects each of the source contact, the source, the drain, and the drain contact, and (b) the additional axis is parallel to the long axis. Other embodiments are described herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.