Increased bandwidth of ordered stores in a non-uniform memory subsystem
US10528253B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2014 |
| Grant date | Jan 7, 2020 |
| Priority date | — |
| Expiry date | Aug 4, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/604
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, computer program product, and system for maintaining a proper ordering of a data steam that includes two or more sequentially ordered stores, the data stream being moved to a destination memory device, the two or more sequentially ordered stores including at least a first store and a second store, wherein the first store is rejected by the destination memory device. A computer-implemented method includes sending the first store to the destination memory device. A conditional request is sent to the destination memory device for approval to send the second store to the destination memory device, the conditional request dependent upon successful completion of the first store. The second store is cancelled responsive to receiving a reject response corresponding to the first store.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.