Inventor · Poughkeepsie, NY, US

Gary E. Strait

27Patents
7h-index
44Co-inventors
69Inventor score

Filing activity: Dec 30, 1983 → Feb 25, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US8656228B2 Memory error isolation and recovery in a multiprocessor computer system Physics 63 Active
US4564944A Error correcting scheme Electricity 20 Expired
US7085897B2 Memory management for a symmetric multiprocessor computer system Physics 19 Expired
US6151655A Computer system deadlock request resolution using timed pulses Physics 17 Expired
US6073182A Method of resolving deadlocks between competing requests in a multiprocessor using global hang pulse logic Physics 15 Expired
US6163857A Computer system UE recovery logic Physics 8 Expired
US5355818A Portable inspection equipment for ocean going vessels Performing Operations; Transporting 8 Expired
US9065481B2 Bad wordline/array detection in memory Physics 7 Active
US8914708B2 Bad wordline/array detection in memory Physics 6 Active
US7383336B2 Distributed shared resource management Physics 5 Active
US9858190B2 Maintaining order with parallel access data streams Physics 3 Active
US10042554B2 Increased bandwidth of ordered stores in a non-uniform memory subsystem Physics 2 Active
US10528253B2 Increased bandwidth of ordered stores in a non-uniform memory subsystem Physics 2 Active
US7478185B2 Directly initiating by external adapters the setting of interruption initiatives Physics 1 Active
US8850129B2 Memory ordered store system in a multiprocessor computer system Physics 1 Active
US8539158B2 Merging data in an L2 cache memory Physics 0 Active
US10331576B2 Deadlock avoidance in a multi-processor computer system with extended cache line locking Physics 0 Active
US9299456B2 Matrix and compression-based error detection Physics 0 Active
US8055753B2 Peer to peer job monitoring and control in grid computing systems Electricity 0 Active
US7886089B2 Method, system and computer program product for enhanced shared store buffer management scheme for differing buffer sizes with limited resources for optimized performance Physics 0 Active
US8250305B2 Method, system and computer program product for data buffers partitioned from a cache array Physics 0 Active
US8090883B2 Method, system and computer program product for enhanced shared store buffer management scheme with limited resources for optimized performance Physics 0 Active
US9268660B2 Matrix and compression-based error detection Physics 0 Active
US11221795B2 Queue management for multiway queues Physics 0 Active
US10572304B2 Dual/multi-mode processor pipelines sampling Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.