Direct memory access (“DMA”) descriptor processing using identifiers assigned to descriptors on DMA engines
US10528494B2 · kind B2 · utility
0Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2017 |
| Grant date | Jan 7, 2020 |
| Priority date | — |
| Expiry date | Sep 15, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/42
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Hardware accelerated synchronization of data movement across multiple direct memory access (DMA) engines is provided using techniques in which the order of descriptor processing is guaranteed for scenarios involving a single CPU and multiple DMA engines as well as those involving multiple CPUs and multiple DMA engines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.