Image sensor having a photoelectric conversion layer coupled to a storage node through a pinning layer with P-type impurities
US10529755B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2017 |
| Grant date | Jan 7, 2020 |
| Priority date | — |
| Expiry date | Sep 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/812
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image sensor includes a first photoelectric conversion layer that is configured to convert light to a first signal. The image sensor also includes a transfer transistor. The transfer transistor includes a storage node region which stores the first signal. The transfer transistor also includes a transfer gate which transfers the stored first signal, and a floating diffusion region that receives the first signal. The image sensor includes a reset transistor that resets the floating diffusion region, and a drive transistor which receives a pixel voltage. The drive transistor generates an output voltage. The image sensor also includes a selection transistor which outputs the output voltage. A reset drain voltage is applied to a drain electrode of the reset transistor, and is independent of the pixel voltage. The reset drain voltage ranges from about 0.1V to about 1.0V.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.