Structure and method for FinFET device with contact over dielectric gate
US10529860B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2018 |
| Grant date | Jan 7, 2020 |
| Priority date | — |
| Expiry date | May 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a first active region and a second fin active region extruded from a semiconductor substrate; an isolation featured formed in the semiconductor substrate and being interposed between the first and second fin active regions; a dielectric gate disposed on the isolation feature; a first gate stack disposed on the first fin active region and a second gate stack disposed on the second fin active region; a first source/drain feature formed in the first fin active region and interposed between the first gate stack and the dielectric gate; a second source/drain feature formed in the second fin active region and interposed between the second gate stack and the dielectric gate; a contact feature formed in a first inter-level dielectric material layer and landing on the first and second source/drain features and extending over the dielectric gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.