Inventor · Hsinchu, TW

Fang Chen

59Patents
11h-index
61Co-inventors
81Inventor score

Filing activity: Mar 5, 1998 → Nov 29, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US6265317A Top corner rounding for shallow trench isolation Electricity 130 Expired
US6869868B2 Method of fabricating a MOSFET device with metal containing gate structures Electricity 83 Expired
US10333623B1 Optical transceiver Electricity 69 Active
US6001538A Damage free passivation layer etching process Electricity 57 Expired
US6174818A Method of patterning narrow gate electrode Electricity 47 Expired
US10797031B2 Semiconductor package Electricity 36 Active
US7122412B2 Method of fabricating a necked FINFET device Electricity 23 Expired
US6867084B1 Gate structure and method of forming the gate dielectric with mini-spacer Electricity 18 Expired
US10276554B1 Integrated standard cell structure Electricity 13 Active
US6051505A Plasma etch method for forming metal-fluoropolymer residue free vias through silicon containing dielectric layers Electricity 13 Expired
US10050042B2 SRAM cell and logic cell design Electricity 11 Active
US7511349B2 Contact or via hole structure with enlarged bottom critical dimension Electricity 11 Active
US6500727B1 Silicon shallow trench etching with round top corner by photoresist-free process Emerging Cross-Sectional Technologies 10 Expired
US9947657B2 Semiconductor device and a method for fabricating the same Electricity 7 Active
US9972571B1 Logic cell structure and method Electricity 7 Active
US6235440A Method to control gate CD Emerging Cross-Sectional Technologies 7 Expired
US9653594B2 Semiconductor device and method for forming the same Electricity 6 Active
US7306746B2 Critical dimension control in a semiconductor fabrication process Electricity 5 Expired
US10468418B2 SRAM cell and logic cell design Electricity 5 Active
US6828237B1 Sidewall polymer deposition method for forming a patterned microelectronic layer Electricity 5 Expired
US10529860B2 Structure and method for FinFET device with contact over dielectric gate Electricity 4 Active
US10914895B2 Package structure and manufacturing method thereof Electricity 3 Active
US10269797B2 Semiconductor device and a method for fabricating the same Electricity 3 Active
US9871046B2 SRAM circuits with aligned gate electrodes Electricity 3 Active
US10332896B2 SRAM circuits with aligned gate electrodes Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.