Patent · US Active

Low voltage differential signaling fault detector

US10530366B1 · kind B1 · utility

1Cited by

1References

20Claims

0Family size

Assignee

STMicroelectronics International N.V. · NL

Inventors

Atul DWIVEDI · Ramnagar, IN
Paras Garg · Noida, IN
Kallol Chatterjee · Noida, IN

Key dates

Filing date	Jul 5, 2019
Grant date	Jan 7, 2020
Priority date	—
Expiry date	Jul 5, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/31706
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A low-voltage-differential-signaling (LVDS) fault detector includes first and second LVDS lines, and a window comparator provides a first output indicating whether a difference between voltages at the first and second LVDS lines is greater than a threshold voltage, and a second output indicating whether a difference between the voltages at the second and first LVDS lines is greater than the threshold voltage. A charge circuit charges a capacitive node when either the first or second output is at a logic low, and discharges the capacitive node when neither the first nor second output is at a logic low. A Schmitt trigger generates a fault flag if charge on the capacitive node falls to a threshold.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.