Method of fabricating an interposer
US10535534B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2017 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Jul 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0588
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method of fabricating an interposer includes: providing a carrier substrate; forming a unit redistribution layer on the carrier substrate, the unit redistribution layer including a conductive via plug and a conductive redistribution line; and removing the carrier substrate from the unit redistribution layer. The formation of the unit redistribution layer includes: forming a first photosensitive pattern layer including a first via hole pattern; forming a second photosensitive pattern layer including a second via hole pattern and a redistribution pattern on the first photosensitive pattern layer; at least partially filling insides of the first via hole pattern, the second via hole pattern, and the redistribution pattern with a conductive material; and performing planarization to make a top surface of the unit redistribution layer flat. According to the method, no undercut occurs under a conductive structure and there are no bubbles between adjacent conductive structures, thus device reliability is enhanced and pattern accuracy is realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.