Semiconductor memory device
US10535678B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2018 |
| Grant date | Jan 14, 2020 |
| Priority date | — |
| Expiry date | Sep 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A semiconductor memory device includes a first member spreading along a first direction and a second direction, a stacked body provided on a third-direction side when viewed from the first member, and a second member provided inside the first member and exposed at a surface of the first member on the third-direction side. A configuration of an end portion in the first direction of the stacked body is a staircase configuration having terraces formed every conductive film. The second member is made from a material different from a material of the first member. The second member is totally disposed in a region opposing a total length of an end edge of the stacked body on the first-direction side, and not disposed in an outer region of the stacked body on the second-direction side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.