Patent · US Active

Substrate dielectric crack prevention using interleaved metal plane

US10537019B1 · kind B1 · utility

0Cited by
3References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 27, 2019
Grant dateJan 14, 2020
Priority date
Expiry dateJun 27, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05K2201/093
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Embodiments of a substrate are provided herein, which include: a first metal plane and a second metal plane in a first metal layer, the first and second metal planes laterally separated by a first gap of dielectric material; and a third metal plane and a fourth metal plane in a second metal layer vertically adjacent to the first metal layer, the third and fourth metal planes laterally separated by a second gap of dielectric material, wherein the second gap comprises a first laterally-shifted gap portion and a second laterally-shifted gap portion, the first laterally-shifted gap portion is laterally offset from a vertical footprint of the first gap in a first lateral direction, and the second laterally-shifted gap portion is laterally offset from the vertical footprint of the first gap in a second lateral direction opposite the first lateral direction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.