Voltage contrast based fault and defect inference in logic chips
US10539612B2 · kind B2 · utility
2Cited by
16References
38Claims
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Key dates
| Filing date | Apr 22, 2016 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Apr 7, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/307
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A voltage contrast imaging defect detection system includes a voltage contrast imaging tool and a controller coupled to the voltage contrast imaging tool. The controller is configured to generate one or more voltage contrast imaging metrics for one or more structures on a sample, determine one or more target areas on the sample based on the one or more voltage contrast imaging metrics, receive a voltage contrast imaging dataset for the one or more target areas on the sample from the voltage contrast imaging tool, and detect one or more defects based on the voltage contrast imaging dataset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.