Patent · US Active

Level-crossing memory trace inspection queries

US10541042B2 · kind B2 · utility

7Cited by
14References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 23, 2018
Grant dateJan 21, 2020
Priority date
Expiry dateApr 23, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C29/44
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Described technologies extend the information available from an execution trace of a program by providing heuristically-derived values for memory contents when the trace does not include data expressly showing the value of a memory cell at a particular execution time. Various heuristics are described. The heuristics may use information about the memory cell at other times to produce the derived value. Some heuristics use other trace data, such as whether the memory cell is in a stack, whether there are gaps in the trace, or whether garbage collection or compilation occurred near the time in question. Grounds for the derived value are reported along with the derived value. A time-travel debugger or other program analysis tool can then present the derived values to users, or make other use of the derived values and grounds to assist debugging and other efforts to improve the functioning of a computing system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.