Packages formed using RDL-last process
US10541228B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2017 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Sep 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes bonding a first device die and a second device die to a substrate, and filling a gap between the first device die and the second device die with a gap-filling material. A top portion of the gap-filling material covers the first device die and the second device die. Vias are formed to penetrate through the top portion of the gap-filling material. The vias are electrically coupled to the first device die and the second device die. The method further includes forming redistribution lines over the gap-filling material using damascene processes, and forming electrical connectors over and electrically coupling to the redistribution lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.