Tile for an active electronically scanned array (AESA)
US10541461B2 · kind B2 · utility
4Cited by
52References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2016 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Jan 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q21/0075
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one aspect, an active electronically scanned array (AESA) tile includes a radiator structure and oxide-bonded semiconductor wafers attached to the radiator structure and comprising a radio frequency (RF) manifold and a beam former. An RF signal path through the oxide-bonded wafers comprises a first portion that propagates toward the beam former and a second portion that propagates parallel to the beam former.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.