Method and device to align phases of clock signals
US10541690B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 27, 2017 |
| Grant date | Jan 21, 2020 |
| Priority date | — |
| Expiry date | Jul 23, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a method and device to align phases of a first clock signal and a second clock signal, include a phase detector, a delay generator, and a controller. The phase detector is configured to generate a preceding signal and a succeeding signal with respect to the first clock signal to detect a relationship between phases of the first clock signal and the second clock signal. The delay generator is configured to delay the first clock signal when the second clock signal falls behind the succeeding signal with respect to the first clock signal. The controller is configured to determine whether the phases of the first clock signal and the second clock signal are aligned with each other according to the relationship detected by the phase detector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.