Method and system for resolving hot spots in LIT
US10545186B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 22, 2014 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Jun 24, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/50
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Localizing hot spots in multi layered device under test (DUT) by using lock-in thermography (LIT) where plural hot spots of electrical circuits are buried in the DUT at different depth layers from a bottom layer to a top layer, comprises applying test signals of multiple frequencies to the electrical circuits of the DUT for exciting the hot spots; imaging a top surface of the top layer of the DUT at timed intervals to obtain IR images of the DUT while the test signal is applied to the electrical circuits wherein the images are in correlation to a propagation of heat from the hot spots in the DUT; detecting the thermal response signals at the timed intervals from the images taken from the DUT; and determining changes in the appearance of hot spot images on the top surface of the DUT in relation to the frequencies of the thermal response signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.