High-speed low VT drift receiver
US10545889B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2018 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Dec 10, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45374
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments relate to systems, methods, and computer-readable media to enable design and creation of receiver circuitry. One embodiment is a receiver apparatus comprising a plurality of receiver arrangements, each receiver arrangement having a sampling circuit and a multi-stage differential amplifier connected to the sampling circuit. Each receiver arrangement is configurable via switches between an amplifying mode and an autozero mode. Control circuitry may select output data from receiver arrangements that are not in autozero mode using multiplexer circuitry. In various embodiments, settings for individual receiver arrangements may be set based on decision feedback equalization (DFE).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.