Modifying a circuit design based on pre-routed top level design
US10546092B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2017 |
| Grant date | Jan 28, 2020 |
| Priority date | — |
| Expiry date | Mar 22, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some examples, a system for modifying circuit can include a processor to detect a previous routed top level circuit design that was proven to close timing within a predetermined range and congestion below a threshold level. The processor can also detect a new pin to be added to a new circuit design and detect user input indicating a bounding box corresponding to a new macro boundary in the previous routed top level circuit design. Additionally, the processor can identify a location of a net in the previous circuit design corresponding to the new pin, wherein the new pin is placed at an intersection between the net and the bounding box. Furthermore, the processor can manufacture a circuit based on the previous circuit design and the placement of the new pin at the intersection between the net and the bounding box.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.