Production of semiconductor regions in an electronic chip
US10553499B2 · kind B2 · utility
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21Claims
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Key dates
| Filing date | May 31, 2018 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | May 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method can be used for fabricating first and second semiconductor regions separated by isolating trenches. A semiconductor substrate is covered with silicon nitride. The silicon nitride situated above the first region is doped by ion implantation. Trenches are etched through the silicon nitride and the doped silicon nitride is partially etching in an isotropic manner. The trenches are filled with an insulator to a level situated above that of the first region. The silicon nitride is removed resulting in the edges of the first region only being covered with an insulator annulus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.