Method of manufacturing an interconnect structure by forming metal layers in mask openings
US10553536B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 26, 2017 |
| Grant date | Feb 4, 2020 |
| Priority date | — |
| Expiry date | Sep 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing an interconnect structure includes providing a substrate structure including a substrate and a first dielectric layer on the substrate and having an opening for a first interconnect layer extending to the substrate, forming a first mask layer on a portion of the first dielectric layer spaced apart from the opening, forming a first metal layer filling the opening and covering a portion of the first dielectric layer not covered by the first mask layer, removing the first mask layer, forming a second dielectric layer on the first dielectric layer and on the first metal layer and having a trench for a second interconnect layer, the trench exposing a portion of the first metal layer; and forming a second metal layer filling the trench and in contact with the exposed portion of the first metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.