Controller hardware automation for host-aware performance booster
US10558393B2 · kind B2 · utility
10Cited by
2References
35Claims
0Family size
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Key dates
| Filing date | Oct 20, 2017 |
| Grant date | Feb 11, 2020 |
| Priority date | — |
| Expiry date | Dec 2, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system is proposed to enable a hardware based host controller to perform operations related to Host-aware Performance booster (HPB). The host controller may retrieve a command packet from a host memory targeting a logical address of a storage location of the storage device, may retrieve a physical address of the storage device mapped to the logical address from the address map, and may send the command packet to the storage device. The sent command packet may have the physical address incorporated therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.