Patent · US Active

Testing a data coherency algorithm

US10558510B2 · kind B2 · utility

0Cited by
10References
20Claims
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Assignee

Inventors

Key dates

Filing dateJan 15, 2018
Grant dateFeb 11, 2020
Priority date
Expiry dateJan 15, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/621
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Testing a data coherency algorithm of a multi-processor environment. The testing includes implementing a global time incremented every processor cycle and used for timestamping; implementing a transactional execution flag representing a processor core guaranteeing the atomicity and coherency of the currently executed instructions; implementing a transactional footprint, which keeps the address of each cache line that was used by the processor core; implementing a reference model, which operates on every cache line and keeps a set of timestamps for every cache line; implementing a core observed timestamp representing a global timestamp, which is the oldest construction date of data used before; implementing interface events; and reporting an error whenever a transaction end event is detected and any cache line is found in the transactional footprint with an expiration date that is older than or equal to the core observed time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.