Patent · US Active

Bulk layer transfer processing with backside silicidation

US10559520B2 · kind B2 · utility

0Cited by
6References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 9, 2018
Grant dateFeb 11, 2020
Priority date
Expiry dateMay 9, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A radio frequency integrated circuit (RFIC) includes a bulk semiconductor die. The RFIC also includes a first active/passive device on a first-side of the bulk semiconductor die, and a first deep trench isolation region extending from the first-side to a second-side opposite the first-side of the bulk semiconductor die. The RFIC also includes a contact layer on the second-side of the bulk semiconductor die. The RFIC further includes a second-side dielectric layer on the contact layer. The first deep trench isolation region may extend through the contact layer and into the second-side dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.