Patent · US Active

Integrated skew control

US10564664B2 · kind B2 · utility

3Cited by
14References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 11, 2017
Grant dateFeb 18, 2020
Priority date
Expiry dateDec 18, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/00323
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Disclosed aspects relate to a clock distribution network of a synchronous logic device. The synchronous logic device has sub-circuits having different clock domains. The clock domains form a hierarchical structure. The clock distribution network has a clock source to provide a global clock signal. A programmable delay line associated with a sub-circuit generates a local clock signal for the sub-circuit by delaying the signal. A global skew control circuit can manage clock skew between the local clock signals. The global skew control circuit may adjust a delay, determine initial operations for the delay lines, verify whether it is possible to perform the initial operations, and perform a correction operation. The correction operation can include correcting the control commands such that the corrected commands lead to the same change of skew adjustment between the local clocks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.