Patent · US Active

ECC decoder with selective component disabling based on decoding message resolution

US10565040B2 · kind B2 · utility

1Cited by

10References

23Claims

0Family size

Assignee

Western Digital Technologies, Inc. · US

Inventors

Yuri Ryabinin · Beer Sheva, IL
Yan Dumchin · Beer Sheva, IL

Key dates

Filing date	Jun 22, 2017
Grant date	Feb 18, 2020
Priority date	—
Expiry date	Jun 22, 2037

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A device includes a non-volatile memory and a low density parity check (LDPC) decoder configured to receive a representation of a codeword from the non-volatile memory. The LDPC decoder includes multiple data processing units (DPUs) and a control circuit coupled to the DPUs. The control circuit is responsive to an error metric associated with the representation of the codeword and is configured to set a message resolution at least partially based on the error metric and to selectively disable one or more components of the LDPC decoder based on the message resolution.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.