Yuri Ryabinin
11Patents
4h-index
22Co-inventors
52Inventor score
Filing activity: Oct 9, 2014 → Jun 15, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9768807B2 | On-the-fly syndrome and syndrome weight computation architecture for LDPC decoding | Physics | 9 | Active |
| US10180874B2 | Storage device operations based on bit error rate (BER) estimate | Electricity | 5 | Active |
| US10218384B2 | ECC decoder with multiple decoding modes | Electricity | 5 | Active |
| US10530393B2 | Configurable ECC decoder | Electricity | 4 | Active |
| US9905314B2 | Storage module and method for datapath bypass | Physics | 2 | Active |
| US9886342B2 | Storage device operations based on bit error rate (BER) estimate | Electricity | 1 | Active |
| US10565040B2 | ECC decoder with selective component disabling based on decoding message resolution | Emerging Cross-Sectional Technologies | 1 | Active |
| US12131058B2 | Configurable arithmetic HW accelerator | Physics | 0 | Active |
| US11190219B1 | Decoder for irregular error correcting codes | Electricity | 0 | Active |
| US11487544B2 | Method and device for simultaneously decoding data in parallel to improve quality of service | Electricity | 0 | Active |
| US11984192B2 | Interface bus speed optimization | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.