Memory controller for receiving differential data strobe signals and application processor having the memory controller
US10572406B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2017 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Feb 15, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller for receiving a differential data strobe signal and an application processor having the memory controller are disclosed. The memory controller includes a strobe signal receiver configured to receive first and second strobe signals from a memory device as differential data strobe signal and output a first detection signal based on a level of each of the first and second strobe signals, a comparator configured to receive the second strobe signal and a reference voltage and compare a level of the second strobe signal with a level of the reference voltage to output a second detection signal, and a gate signal generator configured to generate a gate signal masking a portion of a period corresponding to the differential data strobe signal using the first detection signal and the second detection signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.