Jong-Ryun Choi
15Patents
4h-index
26Co-inventors
56Inventor score
Filing activity: Sep 22, 2009 → Aug 10, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8766691B2 | Duty cycle error accumulation circuit and duty cycle correction circuit having the same | Electricity | 8 | Active |
| US8049543B2 | Delay locked loop, electronic device including the same, and method of operating the same | Electricity | 6 | Active |
| US9857973B1 | Interface circuits configured to interface with multi-rank memory | Emerging Cross-Sectional Technologies | 4 | Active |
| US10073619B2 | Interface circuits configured to interface with multi-rank memory | Emerging Cross-Sectional Technologies | 4 | Active |
| US10115706B2 | Semiconductor chip including a plurality of pads | Electricity | 3 | Active |
| US10840896B2 | Digital measurement circuit and memory system using the same | Electricity | 3 | Active |
| US7994835B2 | Duty control circuit and semiconductor device having the same | Electricity | 3 | Active |
| US9859880B2 | Delay cell and delay line having the same | Electricity | 2 | Active |
| US10572406B2 | Memory controller for receiving differential data strobe signals and application processor having the memory controller | Emerging Cross-Sectional Technologies | 2 | Active |
| US7990195B2 | Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes | Electricity | 1 | Active |
| US8493116B2 | Clock delay circuit and delay locked loop including the same | Electricity | 1 | Active |
| US8283958B2 | Delay-locked loop and electronic device including the same | Electricity | 0 | Active |
| US11381231B2 | Digital measurement circuit and memory system using the same | Electricity | 0 | Active |
| US10977412B2 | Integrated circuit including load standard cell and method of designing the same | Physics | 0 | Active |
| US10756059B2 | Semiconductor chip including a plurality of pads | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.