Semiconductor device resistor including vias and multiple metal layers
US10573711B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2017 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Aug 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53257
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one general aspect, an apparatus can include a first terminal, a second terminal, and a resistive element extending between the first terminal and the second terminal. The resistive element can include a first via in contact with a first segment of a first metal layer and a first segment of a second metal layer, and can include a second via in contact with the first segment of the second metal layer and a second segment of the first metal layer. The apparatus can also include a third via in contact with the second segment of the first metal layer and a third segment of the second metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.