Oxygen inserted Si-layers in vertical trench power devices

US10573742B1 · kind B1 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Thomas Feil · Villach, AT
• Robert Haase · Rancho Palos Verdes, US
• Martin Poelzl · Ossiach, AT
• Maximilian Roesch · Villach, AT
• Sylvain Leomant · Pörtschach am Wörther See, AT
• Bernhard Goller · Villach, AT
• Ravi Keshav Joshi · Klagenfurt, AT

Key dates

• Filing date: Aug 8, 2018
• Grant date: Feb 25, 2020
• Expiry date: Aug 8, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/112
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device includes a gate trench extending into a Si substrate, a body region in the Si substrate adjacent the gate trench, a source region in the Si substrate above the body region, a contact trench extending into the Si substrate and filled with an electrically conductive material which contacts the source region at a sidewall of the contact trench and a highly doped body contact region at a bottom of the contact trench, a diffusion barrier structure formed along the sidewall of the gate trench, the diffusion barrier structure comprising alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si, and a channel region formed in the Si capping layer and which vertically extends along the sidewall of the gate trench. Corresponding methods of manufacture are also described.