High voltage clamp with positive and negative protection
US10574052B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 25, 2017 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Sep 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R2107/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit for power supply protection comprising a first n-channel Metal Oxide Semiconductor Field Effect Transistor (nMOSFET) and a first p-channel Metal Oxide Semiconductor Field Effect Transistor (pMOSFET) each having a drain terminal coupled to an input voltage, a second nMOSFET and a second pMOSFET having drain terminals coupled to an output voltage and sources coupled to a sources of the first and second nMOSFET, respectively, and a control circuit. The control circuit turns the nMOSFETs off and the pMOSFETs on when the input voltage has a voltage value greater than zero and less than a predetermined positive limit, operates the nMOSFETs in a saturation mode and turns the pMOSFETs off when the input voltage has a voltage value greater than the predetermined positive limit, and turn the nMOSFETs and pMOSFETs off when the input voltage has a voltage value less than zero.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.