Integrated circuit devices with selectively arranged through substrate vias and method of manufacture thereof
US10574198B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2016 |
| Grant date | Feb 25, 2020 |
| Priority date | — |
| Expiry date | Dec 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a device substrate having first and second opposing surfaces, a first component electrode coupled to the first surface, and a conductive plane coupled to the second surface. The integrated circuit device also includes a plurality of through substrate vias electrically coupling a first region of the first component electrode to the conductive plane through the device substrate, wherein a second adjacent region of the first component electrode is substantially devoid of through substrate vias. Arrangement of the plurality of through substrate vias in the first region is based on a projected current distribution through the first component electrode when the integrated circuit device is operational.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.