Patent · US Active

Memory having a static cache and a dynamic cache

US10579537B2 · kind B2 · utility

0Cited by

1References

18Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Christopher S. Hale · Boise, US
Sampath K. Ratnam · Boise, US
Kishore Kumar Muchherla · Fremont, US

Key dates

Filing date	May 2, 2019
Grant date	Mar 3, 2020
Priority date	—
Expiry date	May 2, 2039

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first portion configured to operate as a static single level cell (SLC) cache and a second portion configured to operate as a dynamic SLC cache when the entire first portion of the memory has data stored therein.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.