Semiconductor device and method for fabricating the same
US10580891B2 · kind B2 · utility
0Cited by
12References
14Claims
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Key dates
| Filing date | Nov 16, 2018 |
| Grant date | Mar 3, 2020 |
| Priority date | — |
| Expiry date | Nov 16, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
Abstract
A semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer by implanting or doping an element semiconductor material into an interlayer insulating layer may be provided. The semiconductor device may include a gate spacer on a substrate, the gate spacer defining a trench, a gate electrode filling the trench, and an interlayer insulating layer on the substrate, which surrounds the gate spacer, and at least a portion of which includes germanium.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.