Digital filtering for analog gain/phase errors
US10581406B2 · kind B2 · utility
1Cited by
2References
20Claims
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Key dates
| Filing date | Jun 11, 2018 |
| Grant date | Mar 3, 2020 |
| Priority date | — |
| Expiry date | Jun 11, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for digital filtering an analog signal converted to digital, including an analog circuit to generate an analog signal, the analog signal including phase and/or gain errors. An analog-to-digital converter (ADC) to convert the analog signal to a digital signal output to a digital signal path. A frequency-dependent corrector filter included in the digital signal path, and configured as a parameterized filter, the parameterized filter configurable based on the DSA control signal with at least one complex filter parameter for each DSA attenuation step, to correct frequency-dependent errors in phase and/or gain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.