Wait optimizer for recording an order of first entry into a wait mode by a virtual central processing unit
US10592281B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2017 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Mar 5, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45575
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A wait optimizer circuit can be coupled to a processor to monitor an entry of a virtual CPU (vCPU) into a wait mode to acquire a ticket lock. The wait optimizer can introduce an amount of delay, while the vCPU is in the wait mode, with an assumption that the spinlock may be resolved before sending a wake up signal to the processor for rescheduling. The wait optimizer can also record a time stamp only for a first entry of the vCPU from a plurality of entries into the wait mode within a window of time. The time stamps for vCPUs contending for the same ticket lock can be used by a hypervisor executing on the processor for rescheduling the vCPUs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.