Ali Ghassan Saidi
37Patents
8h-index
39Co-inventors
71Inventor score
Filing activity: Mar 20, 2003 → Dec 10, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7487542B2 | Intrusion detection using a network processor and a parallel pattern detection engine | Electricity | 136 | Expired |
| US7366352B2 | Method and apparatus for performing fast closest match in pattern recognition | Physics | 60 | Expired |
| US10901492B1 | Power reduction in processor pipeline by detecting zeros | Emerging Cross-Sectional Technologies | 13 | Active |
| US11620233B1 | Memory data migration hardware | Physics | 11 | Active |
| US10133675B2 | Data processing apparatus, and a method of handling address translation within a data processing apparatus | Emerging Cross-Sectional Technologies | 10 | Active |
| US7444434B2 | Parallel pattern detection engine | Physics | 8 | Active |
| US7243165B2 | Parallel pattern detection engine | Physics | 8 | Expired |
| US9946492B2 | Controlling persistent writes to non-volatile memory based on persist buffer data and a persist barrier within a sequence of program instructions | Physics | 8 | Active |
| US10884790B1 | Eliding redundant copying for virtual machine migration | Physics | 7 | Active |
| US10592428B1 | Nested page tables | Physics | 6 | Active |
| US10592281B1 | Wait optimizer for recording an order of first entry into a wait mode by a virtual central processing unit | Physics | 6 | Active |
| US10768965B1 | Reducing copy operations for a virtual machine migration | Physics | 6 | Active |
| US7185175B2 | Configurable bi-directional bus for communicating between autonomous units | Physics | 5 | Expired |
| US7103750B2 | Method and apparatus for finding repeated substrings in pattern recognition | Electricity | 4 | Expired |
| US9218285B2 | Variable mapping of memory accesses to regions within a memory | Emerging Cross-Sectional Technologies | 4 | Active |
| US10417141B2 | Method and apparatus for hardware management of multiple memory pools | Physics | 3 | Active |
| US8239945B2 | Intrusion detection using a network processor and a parallel pattern detection engine | Electricity | 3 | Active |
| US9996471B2 | Cache with compressed data and tag | Physics | 3 | Active |
| US11307882B1 | Performance checkpointing | Physics | 2 | Active |
| US11237981B1 | Memory scanner to accelerate page classification | Emerging Cross-Sectional Technologies | 2 | Active |
| US7502875B2 | Parallel pattern detection engine | Physics | 2 | Active |
| US9697136B2 | Descriptor ring management | Physics | 2 | Active |
| US7227994B2 | Method and apparatus for imbedded pattern recognition using dual alternating pointers | Physics | 1 | Expired |
| US9372811B2 | Retention priority based cache replacement policy | Physics | 1 | Active |
| US11042494B1 | Direct injection of a virtual interrupt | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.