Packaged die stacks with stacked capacitors and methods of assembling same
US10593618B2 · kind B2 · utility
1Cited by
1References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2018 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Jun 25, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked-die and stacked-capacitor package vertically arranged capacitors to mirror a semiconductive-device stack. The stacked capacitor can be electrically coupled to one or more semiconductive devices in the stacked architecture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.