Methods of producing self-aligned vias
US10600688B2 · kind B2 · utility
4Cited by
34References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2018 |
| Grant date | Mar 24, 2020 |
| Priority date | — |
| Expiry date | Aug 29, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1026
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus to form fully self-aligned vias are described. A seed gapfill layer is formed on a recessed first insulating layers positioned between first conductive lines. Pillars are formed from the seed gapfill layer and a second insulating layer is deposited in the gaps between pillars. The pillars are removed and a third insulating layer is deposited in the gaps in the second insulating layer to form an overburden of third insulating layer. A portion of the overburden of the third insulating layer is removed to expose the first conductive lines and form vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.