Ferroelectric memory cell for an integrated circuit
US10600808B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 5, 2017 |
| Grant date | Mar 24, 2020 |
| Priority date | — |
| Expiry date | Sep 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/689
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprises a ferroelectric memory cell including an oxide storage layer, an electrode layer, and an interface layer. The oxide storage layer comprises a ferroelectric material that is at least partially in a ferroelectric state. The ferroelectric material comprises, as main components, oxygen and any of the group consisting of Hf, Zr and (Hf,Zr). The interface layer is disposed between the oxide storage layer and the electrode layer and includes at least one element with a higher valence value than Hf or Zr.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.