High bandwidth link layer for coherent messages
US10614000B2 · kind B2 · utility
4Cited by
1References
21Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 25, 2018 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Sep 25, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and devices can include link layer logic that is to identify, by a link layer device, first data received from the memory in a first protocol format, identify, by the link layer device, second data received from the cache in a second protocol format, multiplex, by the link layer device, a portion of the first data and a portion of the second data to produce multiplexed data; and generate, by the link layer device, a flow control unit (flit) that includes the multiplexed data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.