Systems and methods to form airgaps
US10615047B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2019 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Feb 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Exemplary etching methods may include flowing a fluorine-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include flowing a hydrogen-containing precursor into the substrate processing region. The methods may include contacting a substrate housed in the substrate processing region with the fluorine-containing precursor and the hydrogen-containing precursor. The substrate may include a trench or recessed feature, and a spacer may be formed along a sidewall of the trench or feature. The spacer may include a plurality of layers including a first layer of a carbon-containing or nitrogen-containing material, a second layer of an oxygen-containing material, and a third layer of a carbon-containing or nitrogen-containing material. The second layer of the spacer may be disposed between the first layer and third layer of the spacer. The methods may also include removing the oxygen-containing material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.