Methods of forming integrated assemblies
US10615165B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2018 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Oct 4, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/63
Abstract
Some embodiments include an integrated assembly having digit lines extending along a first direction, and rails over the digit lines. The rails include semiconductor-material pillars alternating with intervening insulative regions. The rails have upper, middle and lower segments. A first insulative material is along the upper and lower segments of the rails. A second insulative material is along the middle segments of the rails. The second insulative material differs from the first insulative material in one or both of thickness and composition. Conductive gate material is along the middle segments of the rails and is spaced from the middle segments by the second insulative material. Channel regions are within the middle segments of the pillars, upper source/drain regions are within the upper segments of the pillars and lower source/drain regions are within the lower segments of the pillars. Some embodiments include methods of forming integrated assemblies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.