Patent · US Active

Clock and data recovery circuit

US10615804B2 · kind B2 · utility

0Cited by
3References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 24, 2018
Grant dateApr 7, 2020
Priority date
Expiry dateSep 24, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/091
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A clock and data recovery circuit includes a first phase detector, a first charge pump, a first voltage-controlled oscillator (VCO), and an auxiliary module. The auxiliary module includes: an auxiliary clock generator, generating an auxiliary clock signal; a second phase detector, coupled to the auxiliary clock generator, comparing a phase of the auxiliary clock signal with that of a first clock signal outputted by the first VCO; and a multiplexing selecting unit, outputting a multiplexing output signal to the first charge pump according to a selection signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.